Electronic Design

Demystifying Deterministic Latency Within JESD204B Converters

For high-speed signal sampling and processing applications that need an array of synchronized analog-to-digital converters (ADCs), the ability to de-skew and match latency variation across the ...
EDN

Analog-to-digital converter (ADC) accuracy in simple terms

The previous blog discussed how makers can select an A/D converter by understanding the application and how manufacturers optimize a part for that role. Now, what happens when an A/D fires up—how ...
Electronic Design

Synchronizing Multiple ADCs with JESD204B

An FPGA can adjust for SERDES skew with digital buffers to align samples. The AD9250 is a 250-Msample/s, 14-bit dual ADC from Analog Devices that supports the JESD204B interface in a Subclass 1 ...
EDN

Use LTspice to simulate mixed continuous and sampled systems

Did you know that you can use LTspice to do Digital Signal Processing (DSP)? Actually, I should say it is useful for validating the operation of a signal-processing algorithm under development. This ...