EDN

FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture

Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are finite impulse response (FIR) filters and fast Fourier transforms (FFTs).
Design-Reuse

Systolic FIR Filter Based FPGA

In this paper, we first review in detail the basic building blocks of reconfigurable devices, essentially, the field-programmable gate arrays, then we describes a high-speed, reconfigurable Systolic ...
Design-Reuse

Mapping LMS Adaptive Filter IP Core to Multiplier-Array FPGA Architecture for High Channel-Density VOIP Line Echo Cancellation

The LMS adaptive filter is the main functional block in high channel-density line echo cancellers for VOIP. In this paper, we describe an LMS adaptive FIR filter IP and estimate its performance when ...
Nature

FIR Filter Design and Optimization Techniques

The design of finite impulse response (FIR) filters remains a cornerstone of digital signal processing, with ongoing efforts to refine both the algorithmic and hardware aspects of their implementation ...
Semiconductor Engineering

Integrating 16nm FPGA Into 28/22nm SoC Without Losing Speed Or Flexibility

Systems companies like FPGA because it gives parallel processing performance that can outdo processors for many workloads and because it can be reconfigured when standards, algorithms, protocols or ...
EDN

Optimizing Up/Down Conversion with FPGA Techniques

Digital upconverters (DUCs) and digital downconverters (DDCs) are important components of every modern wireless base station design. While many DUC and DDC designs are available, there is a clear call ...