In this blog, my major focus is on explaining the concepts such as Sequence, Sequencer, Driver and showing how the communication takes place from sequence to sequencer and from sequencer to driver. In ...
In this blog, we will see usage of UVM sub-phases by taking an example of reset test. As we know, in UVM, run_phase is divided into multiple sub-phases: In every verification environment, reset ...
One of the reasons I like using UVM is its tendency toward an organized structure and uniformity. Some may find it annoying to adhere to such a strict format in UVM, but I think it’s a good way to ...
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